Run RISC-V Architectural Certification Tests on an emulated atmega1284p via simavr.
RISC-V-emulator-SimAVR
I wired the ACT tests to a simulated AVR because the emulator has to run where a real microcontroller would: no host OS, no fancy loader, just IO registers and a UART. The exit code is the verdict.
Two source files
- `src/main.c`, the simavr host wrapper
- `src/vpi.c` plus a register contract (0x31-0x39) for address, data and exit status
- `platformio.ini` build for the `simavr-host` environment
From hex to exit code
`main.c` loads the Intel HEX, runs the simulation, and stops on power-down sleep, a BREAK halt loop (a repeating 2-instruction PC cycle) or a 25 s timeout. Every UART0 TX byte lands on stdout. The firmware computes offset = address - 0x80000000 and streams the test in byte by byte.