
RISC-V-emulator-Native
RISC-V-emulator implementation useable for RISCOF riscv-arch-test.
A collection of open-source hardware and software projects by Marc Ketel. Includes electronic circuits, PCB designs, 3D models, Arduino code, KiCad libraries, and more.

RISC-V-emulator implementation useable for RISCOF riscv-arch-test.


An emergent RPSLS simulation with animated emoji entities, showcasing dynamic group behaviors and continuous evolution on an HTML5 Canvas.